TNKernel LP - the TNKernel port for the Freescale(c) HCS08 MCU


Description



TNKernel LP (the port for the 8-bit Freescale(c) HCS08 MCU) provides the Ultra Low Power mode supporting.

1. 8-bit MCU hardware-specifics issues

    To minimize FLASH/RAM usage, the only base synchronization objects are used in TNKernel LP - semaphores, data queues, fixed-sized memory pools and subset of task-related functions.

    Number of task priorities was reduced to 8.
Priorities 0 (highest) and 7 (lowest) are reserved by the system for the internal using.
   As in original TNKernel, in TNKernel LP more than one task can have the same (identical) priority.

2. Automatic power-down mode management

    In the regular TNKernel version, the system just performs endless loop inside the idle task.
    In TNKernel LP, when the system enters into an idle task, it performs a more complex operations:

  •   If there are no tasks in the wait mode, the system executes STOP instruction and CPU goes to the sleep mode until wake-up by external interrupt. For some projects, instead entering into endless sleep mode, the system can runs RTI for the project's specific time (for instance, 1.024 s). 
  •   In TNKernel LP, an automatic RTI time pre-calculation is performed in the timer task. A timer task scans wait_timeout_list and calculates maximal possible delay time (number of OS ticks) for the current state of the system. The system runs RTI for the optimal time (at the current system state).
  •   Each time when the system is switched to the idle task, an idle task stack is set to initial value - an idle task always starts from beginning to get a fresh value of pre-calculated RTI time.

3. Transparent switching OS time ticks sources

    In the active run mode, the system uses regular timer as the time tick source (in TNKernel LP examples - TMR1), in the power-down mode - RTI.
    TNKernel LP automatically recognizes wake-up conditions to use a regular timer instead RTI.

4. Interrupt vectors sharing

    When a bootloader is used (for instance, for the field firmware upgrading), the device needs interrupt vectors sharing between bootloader and firmware (application).

    An interrupt vectors are placed in the FLASH.
    To share the Interrupt vectors between the bootloader and a firmware (the user application) programs, the addresses of the interrupt handlers are placed at the reserved RAM locations.

    This is the placement of the interrupts vectors in the FLASH:

sc4.png

    This is a part of source code to place interrupts vectors in RAM:

Image6

5. Debugging

    Unfortunately, the MC9S08GT60A MCU does not supports RTI functionality in BDM mode - to check/debug RTI features, you need to leave BDM debugger or use the Simulator.



Downloads



tnkernel-lp-hcs08-1-0-src.zip   A TNKernel LP source code for the Freescale(r) HCS08 microprocessors (Freescale(r) CodeWarrior (r) v.6.0 compiler)
  This file also contains an examples (includes the projects for MC9S08GT60A MCU)