TNKernel port for the Freescale ColdFire CPU
1. Hardware specifics
With a ColdFire V2 core, TNKernel uses PIT0
timer as system timer source.
TNKernel operates in a supervisor mode.
2. Nested interrupts
TNKernel for ColdFire supports nested interrupts. To recognize a nested interrupt condition, a two macros are used:
A function tn_inside_int() uses status register SR flags (but only after the system’s start):
3. Context switching with ColdFire CPU
With ColdFire core, TNKernel uses a software
interrupt (TRAP #10) to request context switch.
It makes the system context switch similar for both interrupts context switch and regular tasks context switch and simplifies a register save/restore procedure.
For a MCF52231 CPU with EMAC support, the EMAC registers saving/loading routine is included into context switch procedure.
A TNKernel port for ColdFire core comes with 3 examples:
|1.||tn_cw_1||A reference performance calculation - empty OS without user tasks (for CodeWarrrior compiler only).|
|A base OS functionality (tasks, UART, etc) (for CodeWarrrior compiler and IAR ColdFire compiler). The project settings for IAR contains a ‘Simulator’ as the target, but output code has been tested in the CPU (it was loaded into the CPU FLASH by the CodeWarrior flash programmer).|
|3.||tn_cw_3||A full-feature hi-speed UART support with TxD DMA and RxD DMA(includes semaphores, queues, fixed-sized memory pools) (for CodeWarrrior compiler only).|
This is TNKernel source code for Freescale ColdFire MCU.
The file also contains an examples for the Freescale ColdFire MCF52231 MCU and the projects for the Freescale CodeWarrior 7.1 and IAR ColdFire v.1.22 compilers